1. Field of the Invention
The present invention relates to an organic electroluminescent display (OELD) device and a method of fabricating an OELD device, and more particularly, to a dual-plate OELD device and a method of fabricating a dual plate OELD device.
2. Discussion of the Related Art
In general, an OELD device emits light by injecting electrons from a cathode and injecting holes from an anode into an emission layer, combining the electrons with the holes, generating an exciton, and transitioning the exciton from an excited state to a ground state. Unlike liquid crystal display (LCD) devices, an additional light source is not necessary for an OELD device to emit light since the transition of the exciton between the excited and ground states causes light to be emitted from the emission. Accordingly, the size and weight of the OELD device is less than that of an LCD device. In addition, the OELD device has low power consumption, superior image brightness, and fast response times. Thus, the OELD devices are employed in consumer electronic applications, such as cellular phones, car navigation systems (CNS), personal digital assistants (PDA), camcorders, and palmtop computers. Moreover, since the fabrication process for manufacturing the OELD devices is a relatively simple process, it is much less costly to produce an OELD device than it is to produce an LCD device.
Presently, at least two different types of OELD devices exist: passive matrix OELD devices and active matrix OELD devices. Although the passive matrix OELD devices have simple structures and are formed by simple fabrication processes, passive matrix OELD devices require a relatively high amount of power to operate. In addition, the display size of passive matrix OELD devices is limited due to their structure. Furthermore, as a number of conductive lines increases in a passive matrix OELD device, an aperture ratio of the passive matrix OELD devices decreases. On the other hand, active matrix OELD devices have a high emission efficiency and can produce high-quality images for larger displays with relatively low power consumption.
FIG. 1 is a schematic cross sectional view of an OELD device according to the related art. In FIG. 1, an OELD device 10 includes first and second substrates 12 and 28 that are spaced apart from each other and bonded together using a sealant 26. The first substrate 12 includes an array layer 14 having a thin film transistor (TFT) “T” formed on an inner surface of the first substrate 12, wherein a first electrode 16, an organic electroluminescent (EL) layer 18, and a second electrode 20 are sequentially formed on the array layer 14. The organic EL layer 18 may include red, green, and blue emission layers to display full-color images, and each of the red, green, and blue emission layers may be located in each pixel region “P.”
The second substrate 28 includes a moisture absorbent desiccant 22 that eliminates moisture and oxygen that may penetrate into the organic EL layer 18. The moisture absorbent desiccant 22 is disposed within an etched portion of the second substrate 28, and is fixed by a holding element 25.
FIG. 2 is a schematic plan view of an array layer of an OELD device according to the related art. In FIG. 2, an array layer of an OELD device includes a switching element TS, a driving element TD, and a storage capacitor CST formed on a transparent insulating substrate 12, such as glass or plastic, wherein the switching element TS and the driving element TD may include a combination of at least one TFT. In addition, a gate line 32 and a data line 34 crossing each other are formed on the substrate 12, wherein a pixel region P is defined by crossing of the gate line 32 and the data line 34. An insulating layer (not shown) is interposed between the gate line 32 and the data line 34, and a power line 35 is disposed parallel to and spaced apart from the data line 34 and also crosses over the gate line 32.
In FIG. 2, the switching element TS is a TFT that includes a switching gate electrode 36, a switching active layer 40, a switching source electrode 46, and a switching drain electrode 50. Similarly, the driving element TD is a TFT that includes a driving gate electrode 38, a driving active layer 42, a driving source electrode 48 and a driving drain electrode 52. The switching gate electrode 36 is connected to the gate line 32, and the switching source electrode 46 is connected to the data line 34. The switching drain electrode 50 is connected to the driving gate electrode 38 via a first contact hole 54, and the driving source electrode 48 is connected to the power line 35 via a second contact hole 56. In addition, the driving drain electrode 52 is connected to a first electrode 16 at the pixel region P. The power line 35 overlaps a first capacitor electrode 15 with the insulating layer interposed therebetween to form the storage capacitor CST.
FIG. 3 is a schematic plan view of an OELD device according to the related art. In FIG. 3, a substrate 12 includes a data pad part F1, a gate pad part F2, and power supply pad part E, wherein the data pad part F1, a gate pad part F2, and power supply pad part E are located along first and second sides and a third sides adjacent to the first side, respectively. The power supply pad part E is located at an end part of the power supply line 35 (in FIG. 2). In addition, a ground pad is formed along the first side and provides a ground signal to the second electrode 20 (in FIG. 1), such as cathode, to maintain an electric potential of the second electrode 20 (in FIG. 1).
FIG. 4A is a schematic cross sectional view along IVa—IVa of FIG. 2 according to the related art, and FIG. 4B is a schematic cross sectional view along IVb—IVb of FIG. 3 according to the related art. In FIGS. 4A and 4B, a driving TFT TD is formed on a substrate 12 and includes a driving active layer 42, a driving gate electrode 38, a driving source electrode 48, and a driving drain electrode 52. In addition, an insulating layer 57 is formed on the driving TFT TD, and a first electrode 16 is formed on the insulating layer 57 and is connected to the driving drain electrode 52. An organic EL layer 18 is formed on the first electrode 16, and a second electrode 20 is formed on the organic EL layer 18. The first and second electrodes 16 and 20 and the organic EL layer 18 interposed therebetween constitute an OEL diode DEL. As shown in FIG. 2, a storage capacitor CST is disposed to be electrically parallel with the driving TFT TD includes first and second capacitor electrodes 15 and 35a, wherein a portion of the power line 35 (in FIG. 2) overlapping the first capacitor electrode 15 is used as the second capacitor electrode 35a, and the second capacitor electrode 35a is connected to the driving source electrode 56. The second electrode 20 is formed over the substrate 12 including the driving TFT TD, the storage capacitor CST, and the organic EL layer 18.
In FIG. 3, a common electrode 39 is formed along a peripheral portion of the substrate 12 and supplies a common voltage to the second electrode 20. In addition, the common electrode 39 is simultaneously formed with the switching gate electrode 36 (in FIG. 2) and the driving gate electrode 38. Although not shown, multiple insulating layers are formed on the common electrode 39 and include first and second common contact holes 50 and 52 that expose a portion of the common electrode 39. Accordingly, the second electrode 20 is connected to the common electrode 39 via the first common contact hole 50. In addition, an outer IC (not shown) is connected to the common electrode 39 via the second common contact hole 52 in order to supply the common voltage with the common electrode 39.
However, when an array layer of TFTs and organic EL diodes are all formed on a single substrate, production yield of an OELD device is determined by a product of the TFT's yield and the organic EL layer's yield. Since the organic EL layer's yield is relatively low, the production yield of the OELD device is limited by the organic EL layer's yield. For example, even when a TFT is properly fabricated, an OELD device can be determined to be unacceptable due to defects of the organic EL layer using a thin film of about 1000 Å thickness. Accordingly, this limitation causes loss of materials and an increase in production costs.
OELD devices are classified into one of bottom emission-type OELD devices and top emission-type OELD devices according to a transparency of the first and second electrodes and of the organic EL diode. The bottom emission-type OELD devices are advantageous for their high image stability and variable fabrication processing due to encapsulation. However, the bottom emission-type OELD devices are not adequate for implementation in display devices that require high resolution due to the limitations of the increased aperture ratio. On the other hand, since top emission-type OELD devices emit light along a direction upward of the substrate, the light can be emitted without influencing the array layer that is located under the organic EL layer. Accordingly, the overall design of the array layer including TFTS may be simplified. In addition, the aperture ratio can be increased, thereby increasing the operational life span of the organic ELD. However, since a cathode is commonly formed over the organic EL layer in the top emission-type OELD devices, material selection and light transmittance are limited such that light transmission efficiency is lowered. If a thin film type passivation layer is formed to prevent a reduction of the light transmittance, the thin film type passivation layer may fail to prevent infiltration of exterior air into the device.